05754567 is referenced by 182 patents and cites 9 patents.

A nonvolatile memory system emulates a magnetic hard disk drive and includes an array of nonvolatile memory cells, such as flash memory cells, organized into sets, such as sectors. A buffer, such as a random access memory, stores a first set of data to be written to the array. Error correction code (ECC) circuitry receives the first set of data and calculates first ECC check bits representative of the first set of data. ECC comparison circuitry compares the first ECC check bits with second ECC check bits representative of a second set of data stored in the array to generate an ECC comparison signal having a first state indicative of a match between the first and second ECC check bits and a second state indicative of a miscomparison between the first and second ECC check bits.

Title
Write reduction in flash memory systems through ECC usage
Application Number
8/729951
Publication Number
5754567
Application Date
October 15, 1996
Publication Date
May 19, 1998
Inventor
Robert D Norman
Santa Clara
CA, US
Agent
Schwegman Lundberg Woessner & Kluth
Assignee
Micron Quantum Devices
CA, US
IPC
G11C 29/00
G06F 12/00
G06F 11/10
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