05748488 is referenced by 8 patents and cites 43 patents.

A method and system are provided for generating a logic network using a hardware independent description means. A logic circuit synthesizer, in response to a user description specifying only signals and the circumstances under which the signals are produced, generates a logic network that generates the signals specified in the user description, e.g., a net list of logic elements, such as logic gates, high impedance drivers, level sensitive latches and edge sensitive flip-flops along with the interconnections of the logic elements. In one embodiment, the logic circuit synthesizer includes a preprocessor means and a logic circuit generator means. The preprocessor means, in response to the user description, converts signals and conditions in the user description into a structure having nodes interconnected by edges. The edges include an edge condition under which the edge is traversed. The logic circuit generator, using the structure and the edge conditions, creates a logic network that generates the signals specified in the user description.

Title
Method for generating a logic circuit from a hardware independent user description using assignment conditions
Application Number
632439
Publication Number
5748488
Application Date
June 7, 1995
Publication Date
May 5, 1998
Inventor
Russell B Segal
Mountain View
CA, US
Brent L Gregory
Sunnyvale
CA, US
Agent
Skjerven Morrill MacPherson Franklin & Friel
Agent
Forrest E Gunnison
Assignee
Synopsys
CA, US
IPC
G06F 17/50
View Original Source