A capacitor is fabricated on a base surface by applying a first pattern of electrical conductors (a first capacitor plate) over the base surface with an outer surface of the first pattern of electrical conductors including molybdenum. A first hard portion of a capacitor dielectric layer including amorphous hydrogenated carbon is deposited over the first capacitor plate and the base surface, a soft portion of the capacitor dielectric layer is deposited over the first hard portion, and a second hard portion of the capacitor dielectric layer is deposited over the soft portion. The deposition of the soft portion occurs at a lower bias voltage than the deposition of the first and second hard portions. A second pattern of electrical conductors (a second capacitor plate) is applied over the capacitor dielectric layer which is then patterned. A polymer layer is applied over the first and second capacitor plates, and two vias are formed, a first via extending to the first capacitor plate and a second via extending to the second capacitor plate. An electrode-coupling pattern of electrical conductors is applied over the polymer layer, a first portion extending into the first via and a second portion extending into the second via. Deposition of the capacitor dielectric layer can include using a methylethylketone precursor. Additional capacitor dielectric layers and plates having staggered via landing pads can be layered to increase the capacitance.