05731727 is referenced by 46 patents and cites 12 patents.

A control transistor is connected in parallel with an input transistor of a bias generation circuit in a voltage control delay circuit. A power supply potential Vcc is divided by voltage divider resistors to be applied to the gate of the control transistor. Reduction in the power supply potential Vcc causes reduction in a current Ib flowing to the control transistor, and a current Ic=Ia+Ib flowing to a delay time variable element. When the power supply potential Vcc is reduced, the factor of a delay time period of delay time variable elements becoming shorter due to a smaller amplitude of a clock signal is canceled with the factor of the delay time period of the delay time variable elements become longer due to a smaller current Ic flowing thereto. Therefore, variation in the delay time period can be suppressed to a low level.

Title
Voltage control type delay circuit and internal clock generation circuit using the same
Application Number
8/527968
Publication Number
5731727
Application Date
September 14, 1995
Publication Date
March 24, 1998
Inventor
Yasuhiro Konishi
Hyogo
JP
Hisashi Iwamoto
Hyogo
JP
Agent
Lowe Price LeBlanc & Becker
Assignee
Mitsubishi Denki Kabushiki Kaisha
JP
IPC
H03L 1/00
H03K 5/14
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