05657472 is referenced by 56 patents and cites 27 patents.

A multiprocessor computer system is provided having a multiplicity of sub-systems and a main memory coupled to a system controller. An interconnect module, interconnects the main memory and sub-systems in accordance with interconnect control signals received from the system controller. At least two of the sub-systems are data processors, each having a respective cache memory that stores multiple blocks of data and a respective master cache index. Each master cache index has a set of master cache tags (Etags), including one cache tag for each data block stored by the cache memory. Each data processor includes a master interface for sending memory transaction requests to the system controller and for receiving cache access requests from the system controller corresponding to memory transaction requests by other ones of the data processors. In the preferred embodiment, each memory transaction request is classified into one of two distinct master classes: a first transaction class including read memory access requests and a second transaction class including writeback memory access requests. The master interface and system controller have corresponding parallel request queues, one for each master class, for transmitting and receiving memory access requests. The system controller further includes memory transaction request logic for processing each memory transaction request and a duplicate cache index having a set of duplicate cache tags (Dtags), including one cache tag corresponding to each master cache tag in an associated data processor.

Title
Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor
Application Number
8/414922
Publication Number
5657472
Application Date
March 31, 1995
Publication Date
August 12, 1997
Inventor
Charles E Narad
Santa Clara
CA, US
Louis F Coffin III
San Jose
CA, US
Leslie Kohn
Fremont
CA, US
Kevin Normoyle
San Jose
CA, US
Satyanarayana Nishtala
Cupertino
CA, US
Zahir Ebrahim
Mountain View
CA, US
William C Van Loo
Palo Alto
CA, US
Agent
Gary S Flehr Hohbach Test Albritton & Herbert Williams
Assignee
Sun Microsystems
CA, US
IPC
G06F 12/00
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