05610955 is referenced by 46 patents and cites 4 patents.

A phase-locked loop (PLL) circuit which receives a signal at a reference frequency to generate a spread spectrum clock signal. A first divider circuit in the PLL and connected to the PLL input terminal generates an output signal at the reference frequency divided by a first variable integer M. A second divider circuit connected to the PLL output terminal generating an output signal at the output frequency divided by a second variable integer N. The PLL also has a circuit which periodically varies the first variable integer M and the second variable integer N. This permits the frequency of the output signal to vary precisely between two predetermined frequencies to spread the spectrum of output frequencies.

Title
Circuit for generating a spread spectrum clock
Application Number
8/563327
Publication Number
5610955
Application Date
November 28, 1995
Publication Date
March 11, 1997
Inventor
Christopher J Bland
San Jose
CA, US
Agent
Townsend and Townsend and Crew
Assignee
Microclock
CA, US
IPC
H03D 3/24
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