A 3-D integrated circuit (IC) chip stack employs a plurality of discrete chip carriers that are formed from dielectric tape layers such as fused low temperature cofired ceramic (LTCC) tape. The chips are lodged in cavities within the tape layers, and are either flip-chip or wire bond connected to electrical routings that extend along one or more tape layers toward the periphery of the carrier. Intercarrier interconnects are provided between the routings for adjacent carriers, either through the carrier side walls or externally. The carriers are mechanically secured to each other within the stack either by connectors that also provide an I/O signal capability, or by an adhesive if external electrical connectors are used. The structure is strong, compact, inexpensive, compatible with conventional IC chips and capable of disassembly and reassembly to replace a bad chip.