05581704 is referenced by 48 patents and cites 18 patents.

A method and system are provided for maintaining coherency between a server processor and a client processor that has a cache memory. The server may, for example, be a fixed location mobile unit support station. The client may, for example, be a palmtop computer. The server stores a plurality of data values, and the client stores a subset of the plurality of data values in the cache. The server processor periodically broadcasts invalidation reports to the client processor. Each respective invalidation report includes information identifying which, if any, of the plurality of data values have been updated within a predetermined period of time before the server processor broadcasts the respective invalidation report. The client processor determines, based on the invalidation reports, whether a selected data value in the cache memory of the client processor has been updated in the server processor since the selected data value was stored in the cache memory. The client processor invalidates the selected data value in the cache memory of the client processor, if the selected data value has been updated in the server processor.

Title
System for maintaining data coherency in cache memory by periodically broadcasting invalidation reports from server to client
Application Number
8/163335
Publication Number
5581704
Application Date
December 6, 1993
Publication Date
December 3, 1996
Inventor
Tomasz Imielinski
North Brunswick
NJ, US
Daniel Barbara
Princeton
NJ, US
Agent
Ratner & Prestia
Assignee
Panasonic Technologies
NJ, US
IPC
G06F 13/00
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