05578851 is referenced by 100 patents and cites 21 patents.

A trenched DMOS transistor is fabricated using seven masking steps. One masking step defines both the P+ deep body regions and the active portions of the transistor which are masked using a LOCOS process. A second masking step defines the insulating oxide in the termination region. The insulating (oxide) layer in the termination region is thus thicker than in the active region of the transistor, thereby improving process control and reducing substrate contamination during processing. Additionally, the thicker field oxide in the termination region improves electric field distribution so that avalanche breakdown occurs in the cell (active) region rather than in the termination region, and thus breakdown voltage behavior is more stable and predictable.

Title
Trenched DMOS transistor having thick field oxide in termination region
Application Number
290323
Publication Number
5578851
Application Date
March 29, 1996
Publication Date
November 26, 1996
Inventor
King Owyang
Atherton
CA, US
Yueh Se Ho
Sunnyvale
CA, US
Mike F Chang
Cupertino
CA, US
Fwu Iuan Hshieh
Saratoga
CA, US
Agent
Skjerven Morrill MacPherson Franklin & Friel
Agent
Norman R Klivans
Assignee
Siliconix incorporated
CA, US
IPC
H01L 29/94
H01L 29/76
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