05552996 is referenced by 24 patents and cites 23 patents.

The techniques of the present invention facilitate the control of an IC chip fabrication level of a fabrication process based upon the design pattern of the IC chip being fabricated. A grid having multiple sections is imposed over the design pattern of a fabrication level of the IC chip. Then, pattern density values are automatically established for the design pattern contained in each section of the grid. The IC chip fabrication level is then controlled based upon the pattern density values. For example, the established pattern density values facilitate the automatic determination of a CMP process stop parameter, or the automatic compensation for etch rate variations caused by pattern density differences across the design pattern of the IC chip.

Title
Method and system using the design pattern of IC chips in the processing thereof
Application Number
8/390392
Publication Number
5552996
Application Date
February 16, 1995
Publication Date
September 3, 1996
Inventor
Daniel J Nickel
Westford
VT, US
Kathleen McGroddy
Richmond
VT, US
William Leipold
Essex Junction
VT, US
Mark A Lavin
Katonah
NY, US
Cheryl A Hoffman
Jericho
VT, US
Agent
Heslin & Rothenberg P C
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 19/00
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