05532512 is referenced by 191 patents and cites 2 patents.

Power semiconductor device structures and assemblies with improved heat dissipation characteristics and low impedance interconnections include a thermally-conductive dielectric layer, such as diamondlike carbon (DLC) overlying at least portions of the active major surface of a semiconductor chip, with vias formed in the dielectric layer in alignment with contact pads on the active major surface. A patterned metallization layer is formed over the thermally-conductive dielectric layer, with portions of the metallization layer extending through the vias into electrical contact with the chip contact pads. A metal structure is electrically and thermally coupled to selected areas of the patterned metallization, such as by solder bonding or by a eutectic bonding process. In different embodiments, the metal structure may comprise a metal conductor bonded to the opposite major surface of another power semiconductor device structure, a heat-dissipating device-mounting structure, or simply a low-impedance lead.

Title
Direct stacked and flip chip power semiconductor device structures
Application Number
8/316996
Publication Number
5532512
Application Date
October 3, 1994
Publication Date
July 2, 1996
Inventor
James F Burgess
Schenectady
NY, US
Michael W DeVre
Scotia
NY, US
Steven M Gasworth
Glenville
NY, US
Sayed Amr El Hamamsy
Schenectady
NY, US
Charles S Korman
Schenectady
NY, US
Eric J Wildi
Niskayuna
NY, US
Raymond A Fillion
Niskayuna
NY, US
Agent
Marvin Snyder
Assignee
General Electric Company
NY, US
IPC
H05K 7/20
H01L 23/48
H01L 23/02
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