05524244 is referenced by 135 patents and cites 5 patents.

Architectures and methods are provided for efficiently dividing a processing task into tasks for a programmable real time signal processor (SPROC) and tasks for a decision-making microprocessor. The SPROC is provided with a non-interrupt structure where data flow is through a multiported central memory. The SPROC is also programmed in an environment which requires nothing more than graphic entry of a block diagram of the user's design. In automatically implementing the block diagram into silicon, the SPROC programming/development environment accounts for and provides software connection and interfaces with a host microprocessor. The programming environment preferably includes: a high-level computer screen entry system which permits choosing, entry, parameterization, and connection of a plurality of functional blocks; a functional block cell library which provides source code representing the functional blocks; and a signal processor scheduler/compiler which uses the functional block cell library and the information entered into the high-level entry system to compile a program and to output source program code for a program memory and source data code for the data memory of the (SPROC), as well as a symbol table which provides a memory map which maps SPROC addresses to variable names which the microprocessor will refer to in separately compiling its program.

Title
System for dividing processing tasks into signal processor and decision-making microprocessor interfacing therewith
Application Number
663395
Publication Number
5524244
Application Date
February 15, 1994
Publication Date
June 4, 1996
Inventor
Terry F Montlick
Bethlehem
CT, US
Andrew J Krassowski
San Jose
CA, US
Keith Rouse
New Milford
CT, US
Jeffrey I Robinson
New Fairfield
CT, US
Agent
David P Gordon
Assignee
Logic Devices
CA, US
IPC
G06F 9/44
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