05499299 is referenced by 47 patents and cites 21 patents.

A modular arithmetic unit comprises an input register, a multiple computing section, an adder, and a correcting section. There is provided a multiple table in which multiples of a modulo N are stored to correspond with low-order some bits of an input number T in the input register. The low-order some bits of the input number T are used to look up its corresponding multiple of the modulo N in the multiple table. The adder adds the multiple of the modulo N retrieved from the multiple table and the contents of the input register. This addition is performed n times. The contents of the input register are updated with high-order predetermined bits of the sum in the adder each time addition is performed in the adder. The correcting section makes a correction on the result t of addition by the adder after n additions have been performed.

Title
Modular arithmetic operation system
Application Number
8/268435
Publication Number
5499299
Application Date
June 30, 1994
Publication Date
March 12, 1996
Inventor
Ryota Akiyama
Kawasaki
JP
Takayuki Hasebe
Kawasaki
JP
Naoya Torii
Kawasaki
JP
Masahiko Takenaka
Kawasaki
JP
Agent
Nikaido Marmelstein Murray & Oram
Assignee
Fujitsu
JP
IPC
G06F 7/38
H04L 9/30
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