A video processing module designed for high performance using economical components. A programmable logic device (PLD) is configured to modify a data stream, in particular a video stream. The PLD can be connected to a memory resource. In addition, the PLD can be connected to a second PLD through an interruptable connection. The second PLD can be optimized for bus interface communication and connected to an external system, typically a host computer. The second PLD can take commands from the host to prepare a processing configuration for the first PLD and can connect when needed to download a configuration to the first PLD through the interruptable connection. An array of these modules can be connected in a systolic array to provide powerful, pipelined video processing.