05483741 is referenced by 223 patents and cites 26 patents.

A method for forming a self-limiting, silicon based interconnect for making temporary electrical contact with bond pads on a semiconductor die is provided. The interconnect includes a silicon substrate having an array of contact members adapted to contact the bond pads on the die for test purposes (e.g., burn-in testing). The interconnect is fabricated by: forming the contact members on the substrate; forming a conductive layer on the tip of the contact members; and then forming conductive traces to the conductive layer. The conductive layer is formed by depositing a silicon containing layer (e.g., polysilicon, amorphous silicon) and a metal layer (e.g., titanium, tungsten, platinum) on the substrate and contact members. These layers are reacted to form a silicide. The unreacted metal and silicon containing layer are then etched selective to the conductive layer which remains on the tip of the contact members. Conductive traces are then formed in contact with the conductive layer using a suitable metallization process. Bond wires are attached to the conductive traces and may be attached to external test circuitry. Alternately, another conductive path such as external contacts (e.g., slide contacts) may provide a conductive path between the conductive traces and external circuitry. The conductive layer, conductive traces and bond wires provide a low resistivity conductive path from the tips of the contact members to external test circuitry.

Title
Method for fabricating a self limiting silicon based interconnect for testing bare semiconductor dice
Application Number
716394
Publication Number
5483741
Application Date
November 7, 1994
Publication Date
January 16, 1996
Inventor
Alan G Wood
Boise
ID, US
Warren M Farnworth
Nampa
ID, US
Salman Akram
Boise
ID, US
Agent
Stephen A Gratton
Assignee
Micron Technology
ID, US
IPC
H05K 3/02
View Original Source