A fault location system comprises voltage/current transducers 10A, 10B located at terminals A and B, respectively; digital relays 12A and 12B respectively coupled to transducer blocks 10A and 10B; and a fault location estimation processor 14, which may comprise a substation controller at substation S.sub.A or substation S.sub.B, a relay at A or B, a stand alone computer at A or B, or a computer at a central location. The digital relays receive analog voltage and current signals (V.sub.A, I.sub.A, V.sub.B, I.sub.B) from the respective transducers and output digital phasor or oscillographic data to the fault location estimation block. The fault location estimation block is programmed to provide the fault location parameter m. The fault location estimation provided by the inventive technique is unaffected by the fault resistance, load current, mutual coupling effects from a parallel line, uncertainties in zero sequence values, shunt elements, and X/R characteristic of the system. The fault location can be estimated accurately even in cases of substantial resistance and load flow. In addition, the invention does not require synchronization of the data received from the respective A and B terminals, nor does it require pre-fault data or fault type selection.