05389738 is referenced by 119 patents and cites 10 patents.

A tamperproof arrangement for an integrated circuit device. The arrangement includes a package and lid fabricated of heavy metals to prevent X-radiation or infrared detection of circuit operation. Sensors and control circuitry are located on the integrated circuit die itself which detect increased temperature and radiation and clear or zeroize any sensitive information included within the integrated circuit device. Electrode finger grids above and below the integrated circuit die detect physical attempts to penetrate the integrated circuit die. Critical circuit functions are segregated from non-critical functions. Power applied to the integrated circuit device is monitored and separated for critical and non-critical circuit functions.

Title
Tamperproof arrangement for an integrated circuit device
Application Number
7/878271
Publication Number
5389738
Application Date
May 4, 1992
Publication Date
February 14, 1995
Inventor
Ronald V Chandos
Tempe
AZ, US
David M Harrison
Mesa
AZ, US
Gerald V Piosenka
Scottsdale
AZ, US
Agent
Frank J Bogacz
Assignee
Motorola
IL, US
IPC
H04L 9/00
G08B 19/00
H01L 23/28
H01L 23/02
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