05388265 is referenced by 190 patents and cites 38 patents.

A method and apparatus for a chip to monitor its own activity and enter and exit a state of reduced power consumption. The present invention includes defining a predetermined state in which the chip could power down cleanly and monitoring the chip to determine when the chip is in that predetermined state. The present invention also includes a method and apparatus for putting the chip in a state of reduced power consumption state when the chip is in the predetermined state. The present invention also includes a method and apparatus for either turning off the clock generation circuitry or leaving it on during the power down state.

Title
Method and apparatus for placing an integrated circuit chip in a reduced power consumption state
Application Number
848416
Publication Number
5388265
Application Date
April 26, 1993
Publication Date
February 7, 1995
Inventor
Andrew M Volk
Loomis
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
Intel Corporation
CA, US
IPC
G06F 9/00
View Original Source