05371654 is referenced by 318 patents and cites 30 patents.

The present invention is directed to a structure for packaging electronic devices, such as semiconductor chips, in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies. Each assembly is formed from a substrate having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection electrically interconnecting each assembly. The electrical interconnection formed from an elastomeric interposer having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection is disposed over the array of electronic devices so that the electrical interconnection between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection between adjacent assemblies. Methods for fabricating the electrical interconnection as a stand alone elastomeric sheet are described.

Title
Three dimensional high performance interconnection package
Application Number
7/963346
Publication Number
5371654
Application Date
October 19, 1992
Publication Date
December 6, 1994
Inventor
George F Walker
New York
NY, US
Da Yuan Shih
Poughkeepsie
NY, US
Leathen Shi
Yorktown Heights
NY, US
John J Ritsko
Mt. Kisco
NY, US
Maurice H Norcott
Valley Cottage
NY, US
Paul A Lauro
Nanuet
NY, US
James L Hedrick Jr
Oakland
CA, US
Keith E Fogel
Bardonia
NY, US
Fuad E Doany
Katonah
NY, US
Brian S Beaman
Hyde Park
NY, US
Agent
Daniel P Morris
Assignee
International Business Machines Corporation
NY, US
IPC
H05K 7/00
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