05353195 is referenced by 105 patents and cites 9 patents.

A multi-chip module includes a substrate supporting a plurality of chips. A dielectric layer which overlies the chips and the substrate has a connection surface and a substrate surface with metallization planes having plane openings patterned on each surface and vias aligned with predetermined pads on the chips and predetermined portions of the metallization plane of the substrate surface. An adhesive layer is situated between the substrate and the substrate surface of the dielectric layer, and a pattern of electrical conductors extends through the vias to interconnect selected chips and selected portions of the metallization planes. In a related design, the dielectric layer may be a board having chip openings and conductive through-connections aligned with predetermined portions of the metallization plane of the substrate surface. The board can be thick enough that chip wells are not necessary for each chip, in which case, a base dielectric layer having vias aligned with chip pads, through-connections and the connection surface overlies the board and supports a pattern of electrical conductors which interconnect the chips and metallization planes.

Title
Integral power and ground structure for multi-chip modules
Application Number
8/87433
Publication Number
5353195
Application Date
July 9, 1993
Publication Date
October 4, 1994
Inventor
Robert J Wojnarowski
Ballston Lake
NY, US
Raymond A Fillion
Niskayuna
NY, US
Agent
Geoffrey H Krauss
Assignee
General Electric Company
NY, US
IPC
H05K 7/02
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