05347177 is referenced by 110 patents and cites 11 patents.

This invention provides a means to interconnect high performance CMOS VLSI circuits. LTL (a coined descriptor for describing a novel CMOS interface standard) offers improved performance by providing active threshold control of an input buffer to speed signal capture, and by controlling performance limiting characteristics of signal reflection, ground bounce, receiver overdriving and ringing. These performance limiting characteristics are controlled by providing: level-sensitive impedance control of an output driver, distributed active line termination using impedances of input buffers on a transmission line, and balanced loading using closed-loop transmission lines.

Title
System for interconnecting VLSI circuits with transmission line characteristics
Application Number
8/4364
Publication Number
5347177
Application Date
January 14, 1993
Publication Date
September 13, 1994
Inventor
Robert J Lipp
15881 Rose Ave., Los Gatos, 95030
CA, US
Agent
Skjerven Morrill MacPherson Franklin & Friel
IPC
H03K 19/0175
H03K 17/16
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