05343063 is referenced by 522 patents and cites 29 patents.

A memory array of PROM, EPROM or EEPROM cells has each cell formed in a trench of a thick oxide layer deposited on a silicon substrate, in a manner that a significant portion of opposing areas of the floating gate and control gate of each cell which provide capacitive coupling between them are formed vertically. This allows the density of the array to be increased since the amount of semiconductor substrate area occupied by each cell is decreased without having to sacrifice the amount or quality of the capacitive coupling. Further, a technique of forming capacitive coupling between the floating gate and an erase gate in a flash EEPROM array cell with improved endurance is disclosed.

Title
Dense vertical programmable read only memory cell structure and processes for making them
Application Number
7/629250
Publication Number
5343063
Application Date
December 18, 1990
Publication Date
August 30, 1994
Inventor
Eliyahou Harari
Los Gatos
CA, US
Daniel C Guterman
Fremont
CA, US
Gheorghe Samachisa
San Jose
CA, US
Jack H Yuan
Cupertino
CA, US
Agent
Majestic Parsons Siebert & Hsue
Assignee
SunDisk Corporation
CA, US
IPC
H01L 29/78
H01L 29/68
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