05329423 is referenced by 188 patents and cites 8 patents.

A electrically interconnected assembly includes an electronic component, such as an integrated circuit chip, having a first pattern of contact sites and includes a substrate having a second pattern of contact sites corresponding to the first pattern. The electronic component is demountably connected to the substrate by a bump-and-socket arrangement at each pair of contact sites. One of the contact sites has a raised bump that is received within a depressed area of the other contact site. The raised bumps are pressed into the depressed areas, forming a ring of contact to electrically and mechanically connect the electronic component to the substrate. Preferably, the depressed areas are formed in a compliant material that allows some deformation but not so much as to allow the raised bumps to bottom out against the depressed areas. The assembly may be used in forming multi-chip modules having demountable integrated circuit chips.

Compressive bump-and-socket interconnection scheme for integrated circuits
Application Number
Publication Number
Application Date
April 13, 1993
Publication Date
July 12, 1994
Kenneth D Scholz
4150 Willmar Dr., Palo Alto, 94306
H05K 7/02
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