05323060 is referenced by 274 patents and cites 19 patents.

A multichip module includes: a) a multichip module substrate; b) a first chip, the first chip having opposed base and bonding faces, the base face being adhered to the multichip module substrate, the first chip bonding face including a central area and a plurality of bonding pads peripheral to the central area; c) a second chip, the second chip having opposed base and bonding faces, the second chip bonding face including a central area and a plurality of peripheral bonding pads; d) a first/second adhesive layer interposed between and connecting the first chip bonding face and the second chip base face, the first/second adhesive layer having a thickness and a perimeter, the perimeter being positioned within the central area inside of the peripheral bonding pads; e) a plurality of first loop bonding wires bonded to and between the respective first chip bonding pads and the multichip module substrate, the respective first bonding wires having outwardly projecting loops of a defined loop height, the thickness of the adhesive layer being greater than the loop height to displace the second chip base face in a non-contacting relationship above and with respect to the first wires; and f) a plurality of second loop bonding wires bonded to and between the respective second chip bonding pads and the multichip module substrate.

Title
Multichip module having a stacked chip arrangement
Application Number
8/71580
Publication Number
5323060
Application Date
June 2, 1993
Publication Date
June 21, 1994
Inventor
Michael B Ball
Boise
ID, US
Rich Fogal
Boise
ID, US
Agent
Wells St John Roberts Gregory & Matkin
Assignee
Micron Semiconductor
ID, US
IPC
H01L 39/02
H01L 23/16
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