05319755 is referenced by 277 patents and cites 54 patents.

An apparatus for storing and retrieving data is described. The apparatus includes a circuitry for initiating data transmission, a first memory, a second memory, and a multiline bus for transferring control information, addresses, and the data. The control information includes information for selecting one of the first and second memories without using any separate memory select line. Configuration circuitry is provided for assigning a first identification value to the first memory and a second identification value to the second memory. The configuration circuitry includes a first reset line for coupling the circuitry for initiating data transmission to the first memory, a second reset line for coupling the first memory to the second memory, a first identification register for the first memory, a second identification register for the second memory, circuitry for generating a first reset signal and a second reset signal and for sending the first and second reset signals to the first identification register, circuitry for propagating the first and second reset signals from the first identification register to the second identification register, circuitry for resetting the first and second identification registers in response to the first reset signal, and circuitry for setting the first identification register to the first identification value and the second identification register to the second identification value in response to the second reset signal.

Title
Integrated circuit I/O using high performance bus interface
Application Number
510898
Publication Number
5319755
Application Date
September 30, 1992
Publication Date
June 7, 1994
Inventor
Mark Horowitz
Palo Alto
CA, US
Michael Farmwald
Berkeley
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
Rambus
CA, US
IPC
G06F 13/00
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