05253328 is referenced by 18 patents and cites 4 patents.

A neural network content-addressable error-correcting memory system is disclosed including a plurality of hidden and visible processing units interconnected via a linear interconnection matrix. The network is symmetric and all self-connections are not present. All connections between processing units are present, except those connecting hidden units to other hidden units. Each visible unit is connected to each other visible unit and to each hidden unit. A mean field theory learning and retrieval algorithm is also provided. Bit patterns or code words are stored in the network via the learning algorithm. The retrieval algorithm retrieves error-corrected bit patterns in response to noisy or error-containing input bit patterns.

Title
Neural-network content-addressable memory
Application Number
7/439124
Publication Number
5253328
Application Date
November 17, 1989
Publication Date
October 12, 1993
Inventor
Eric J Hartman
Austin
TX, US
Agent
Fulbright & Jaworski
Assignee
Microelectronics & Computer Technology
TX, US
IPC
G06F 15/46
View Original Source