05247423 is referenced by 177 patents and cites 7 patents.

A stackable three dimensional leadless multi-chip module (10) is provided whereby each level of semiconductor device (11) is interconnected to another level through reflowing of solder plated wires (22). Each semiconductor device (11) contains a semiconductor die (24) overmolded by a package body (12) on a PCB substrate (14) having a plurality of edge metal conductors (16) that form half-vias (18). The half-vias (18) at the edges of substrate (14) give the substrate a castellated appearance, where the castellations serve as the self-aligning feature during the stacking of the devices (11). Each device (11) is simply stacked on top of each other without any additional layers to give the semiconductor module (10) a lowest possible profile. A plurality of solder plated wires (22) fits into the half-vias (18) and is solder reflowed to the metal conductors (16) to interconnect the semiconductor devices (11). The wires (22) are bent to enable the module (10) to be surface mounted to a PC board.

Title
Stacking three dimensional leadless multi-chip module and method for making the same
Application Number
7/887963
Publication Number
5247423
Application Date
May 26, 1992
Publication Date
September 21, 1993
Inventor
Michael B McShane
Austin
TX, US
Paul T Lin
Austin
TX, US
Agent
James L Clingan Jr
Assignee
Motorola
IL, US
IPC
H05K 7/20
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