05241680 is referenced by 125 patents and cites 11 patents.

A method and apparatus for configuring a computer in a low-power mode are provided. In the low-power mode, dynamic random access memory is refreshed by a battery powered system in order to maintain the memory contents. Low-power mode is entered by saving an interrupt mask and by disabling interrupts, followed by saving the DMA status, finishing DMA operations, and disabling DMA. After these steps, the I/O state of the machine is saved by saving various I/O registers and ports. A refresh of the memory is forced before the system refresh operations are discontinued.

Title
Low-power, standby mode computer
Application Number
365147
Publication Number
5241680
Application Date
October 9, 1992
Publication Date
August 31, 1993
Inventor
James H McNamara
Santa Cruz
CA, US
James F Cole
Palo Alto
CA, US
Agent
Townsend and Townsend
Assignee
Grid Systems Corporation
CA, US
IPC
G06F 1/30
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