05220670 is referenced by 4 patents and cites 5 patents.

An instruction execution unit of a microprocessor has an ALU, a barrel shifter and a plurality of registers and these circuit blocks are coupled to an internal bus. In response to a specific instruction, the microprocessor operated to transfer output data of the plurality of circuit blocks at a time, so that logical operation of the plurality of output data is carried out on the internal bus at a high speed. The specific instruction designates which ones of the plurality of circuit blocks should transfer data to the internal bus and which one of the plurality of circuit blocks should be stored with the results of the logical operation carried out on the internal bus.

Title
Microprocessor having ability to carry out logical operation on internal bus
Application Number
7/336778
Publication Number
5220670
Application Date
April 13, 1989
Publication Date
June 15, 1993
Inventor
Ikuya Kawasaki
Tokyo
JP
Tetsuhiko Okada
Tama
JP
Fumio Arakawa
Tokyo
JP
Agent
Antonelli Terry Stout & Kraus
Assignee
Hitachi
JP
IPC
G06F 7/00
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