05198758 is referenced by 70 patents and cites 4 patents.

A test register coupled to an absolute delay regulator circuit of a clock repeater chip enables complete functional testing of a clock delay path of the regulator. The test register is connected to a measurement latch of the clock path in a "logical OR" configuration with respect to a measurement delay line and is enabled during a test mode by control logic of the repeater chip. Operationally, a sequence of logic "0" bits are forced in the measurement delay line during test mode. A state machine clears the measurement latch, and then loads a test pattern into the test register. As each bit of the register is set, a corresponding bit in the measurement latch is also set to simulate a measurement cycle; the results of the "measurement" are stored in the measurement latch. Once the test pattern is loaded, the repeater chip is placed into a measurement test mode. Execution of a measurement test cycle then propagates the test pattern throughout the clock delay path of the regulator. An output clock signal is sampled and if determined present, indicates that the clock path column under test is functional. Each column of the clock path is then tested separately in sequence.

Title
Method and apparatus for complete functional testing of a complex signal path of a semiconductor chip
Application Number
7/764314
Publication Number
5198758
Application Date
September 23, 1991
Publication Date
March 30, 1993
Inventor
Richard B Watson Jr
Harvard
MA, US
Russell Iknaian
Groton
MA, US
Agent
Cesari and McKenna
Assignee
Digital Equipment
MA, US
IPC
G01R 31/28
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