05193167 is referenced by 102 patents and cites 3 patents.

A high performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data width and addressing modes. The instruction set is limited to register-to-register operations and register load/store operations. Byte manipulation instructions, included to permit use of previously-established data structures, include the facility for doing in-register byte extract, insert and masking, along with non-aligned load and store instructions. The provision of load/locked and store/conditional instructions permits the implementation of atomic byte writes.

Title
Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system
Application Number
7/547618
Publication Number
5193167
Application Date
June 29, 1990
Publication Date
March 9, 1993
Inventor
Richard T Witek
Littleton
MA, US
Richard L Sites
Boylston
MA, US
Agent
Arnold White & Durkee
Assignee
Digital Equipment Corporation
MA, US
IPC
G06F 13/00
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