05193158 is referenced by 55 patents and cites 42 patents.

Method and apparatus for sequentially executing a plurality of pipelined instruction words of a program in which each instruction has independently selectable execution cycle count latencies. After the occurrence of an exception, instructions are identified which began after the instruction that caused the exception, and which have completed execution before execution of the exception provoking instruction was inhibited. Detection of an exception causes the processor to inhibit further execution of the exception provoking instruction. Pending instructions, which have yet to complete their execution prior to the inhibition of the exception provoking instruction, are similarly inhibited from further execution. Subsequently, the exception is serviced and the exception inducing instruction is restarted for re-execution in the processor. Pending instructions are subsequently re-executed in the sequence of their occurrence at the time the exception provoking instruction caused the processor to inhibit further instruction execution. Completed instructions are not re-executed. Applicable to computing systems having a plurality of processors, of either the same or different type such as floating point and integer processors, the method and apparatus inhibits all such further execution of plural processors upon the detection of an exception in one of the processors. In processors other than the processors serving the exception, no-op instructions are executed until the processor servicing the exception causes pending instructions to be re-executed, at which time the other processors also re-execute instructions which were pending at the time further execution of the instructions was inhibited.

Title
Method and apparatus for exception handling in pipeline processors having mismatched instruction pipeline depths
Application Number
259793
Publication Number
5193158
Application Date
October 18, 1991
Publication Date
March 9, 1993
Inventor
John Manton
Marlboro
MA, US
Michael Kahaiyan
East Bridgewater
MA, US
Christopher H Mills
Chelmsford
MA, US
Anthony N Drogaris
Wellesley
MA, US
Daryl F Kinney
Hopkinton
MA, US
Assignee
Hewlett Packard Company
CA, US
IPC
G06F 15/16
G06F 9/38
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