05172338 is referenced by 1028 patents and cites 9 patents.

Improvements in the circuits and techniques for read, write and erase of EEprom memory enable non-volatile multi-state memory to operate with enhanced performance over an extended period of time. In the improved circuits for normal read, and read between write or erase for verification, the reading is made relative to a set of threshold levels as provided by a corresponding set of reference cells which closely track and make adjustment for the variations presented by the memory cells. In one embodiment, each Flash sector of memory cells has its own reference cells for reading the cells in the sector, and a set of reference cells also exists for the whole memory chip acting as a master reference. In another embodiment, the reading is made relative to a set of threshold levels simultaneously by means of a one-to-many current mirror circuit. In improved write or erase circuits, verification of the written or erased data is done in parallel on a group of memory cells at a time and a circuit selectively inhibits further write or erase to those cells which have been correctly verified. Other improvements includes programming the ground state after erase, independent and variable power supply for the control gate of EEprom memory cells.

Title
Multi-state EEprom read and write circuits and techniques
Application Number
337579
Publication Number
5172338
Application Date
April 11, 1990
Publication Date
December 15, 1992
Inventor
Winston Lee
San Francisco
CA, US
Eliyahou Harari
Los Gatos
CA, US
Sanjay Mehrotra
Milpitas
CA, US
Agent
Majestic Parsons Siebert & Hsue
Assignee
Sundisk Corporation
CA, US
IPC
G11C 16/04
G11C 29/00
G11C 7/00
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