05168072 is referenced by 125 patents and cites 10 patents.

An improved device fabrication method and transistor structure 36 provide shallow, heavily doped, source/drain junction regions 64 and a uniformly doped lower gate region 50 having a high concentration of dopants efficiently distributed near the gate electrode/gate interface 51. The gate, source, and drain terminals of transistor 36 may be interconnected to other neighboring or remote devices through the use of reacted refractory metal interconnect segments 98 and 100. Transistor structure 36 of the present invention may be constructed in an elevated source/drain format to include elevated source/drain junction regions 87 which may be fabricated simultaneous with a primary upper gate electrode region 88. This elevated source/drain junction feature is provided without added device processing complexity.

Title
Method of fabricating an high-performance insulated-gate field-effect transistor
Application Number
7/596839
Publication Number
5168072
Application Date
October 12, 1990
Publication Date
December 1, 1992
Inventor
Mehrdad M Moslehi
Dallas
TX, US
Agent
Richard L Donaldson
James C Kesterson
Ira S Matsil
Assignee
Texas Instruments Incorporated
TX, US
IPC
H01L 21/336
View Original Source