05166926 is referenced by 123 patents and cites 26 patents.

Apparatus, and accompanying methods for use therein, for a large (e.g. approximately 1 Terabit/second), fault tolerant packet switch (200), particularly suited for asynchronous mode transfer (ATM) communication, which utilizes cell address look-ahead in conjunction with parallel planes of self-routing cross-points (550), staggered time phased contention resolution and shared memory based input and output modules (260 and 270, respectively). Each incoming packet cell has added thereto an additional header field containing information identifying a particular output module and a particular output port of that module. An input module associated with the switching crosspoints changes the additional header information to identify the particular output module of the next subsequent packet cell.

Title
Packet address look-ahead technique for use in implementing a high speed packet switch
Application Number
7/629604
Publication Number
5166926
Application Date
December 18, 1990
Publication Date
November 24, 1992
Inventor
Ivan P Auer
Middletown
NJ, US
Gary A Hayward
Middletown
NJ, US
Arturo Cisneros
Lincroft
NJ, US
Agent
James W Falk
Leonard Charles Suchyta
Assignee
Bell Communications Research
NJ, US
IPC
H04Q 11/04
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