05163139 is referenced by 57 patents and cites 22 patents.

An instruction memory apparatus for a data processing unit stores a sequence of instructions. At each instruction fetch cycle, two sequentially adjacent instructions are accessed. An instruction preprocessing unit, coupled to the internal instruction memory, combines the two sequentially adjacent instructions into a single long instruction word when the two instructions meet predefined criteria for being combined. The first of the two instructions is combined with a no-operation instruction to generate a long instruction word when the predefined criteria are not met. In that case, the second instruction [may be accessed again] is used during the next instruction fetch cycle as the first of the two sequentially adjacent instructions to be processed during that next instruction fetch cycle.

Title
Instruction preprocessor for conditionally combining short memory instructions into virtual long instructions
Application Number
7/575140
Publication Number
5163139
Application Date
August 29, 1990
Publication Date
November 10, 1992
Inventor
Toru Baji
Burlingame
CA, US
Stephen G Haigh
Redwood City
CA, US
Agent
Flehr Hohbach Test Albritton & Herbert
Assignee
Hitachi America
CA, US
IPC
G06F 9/38
G06F 9/30
View Original Source