05159678 is referenced by 99 patents and cites 11 patents.

The present invention provides a parallel memory scheduler for execution on a high speed highly parallel multiprocessor architecture. The operating system software provides intelligence and efficiency in swapping out process images to facilitate swapping in another process. The splitting and coalescing of data segments are used to fit segments in to current free memory even though a single contiguous space of sufficient size does not exist. Mapping these splits through data control register sets retains the user's contiguous view of the address space. The existence of dual images and partial swapping allows efficient, high speed swapping. Candidates for swap out are chosen in an intelligent fashion, selecting only those candidates which will most efficiently aLlow the swapin of another process.

Title
Method for efficient non-virtual main memory management
Application Number
537466
Publication Number
5159678
Application Date
August 23, 1990
Publication Date
October 27, 1992
Inventor
Gregory G Gaertner
Eau Claire
WI, US
Diane M Wengelski
Eau Claire
WI, US
Agent
Patterson & Keough
Assignee
Supercomputer Systems Partnership
WI, US
IPC
G06F 13/00
G06F 12/02
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