05148536 is referenced by 96 patents and cites 27 patents.

A load/store pipeline in a computer processor for loading data to registers and storing data from the registers has a cache memory within the pipeline for storing data. The pipeline includes buffers which support multiple outstanding read request misses. Data from out of the pipeline is obtained independently of the operation of the pipeline, this data corresponding to the request misses. The cache memory can then be filled with the data that has been requested. The provision of a cache memory within the pipeline, and the buffers for supporting the cache memory, speed up loading operations for the computer processor.

Title
Pipeline having an integral cache which processes cache misses and loads data in parallel
Application Number
7/224483
Publication Number
5148536
Application Date
July 25, 1988
Publication Date
September 15, 1992
Inventor
Richard Heye
Somerville
MA, US
Rebecca L Stamm
Newton
MA, US
Douglas J Burns
Billerica
MA, US
David M Fenwick
Chelmsford
MA, US
Timothy J Stanley
Leominster
MA, US
Douglas D Williams
Pepperell
MA, US
Richard T Witek
Littleton
MA, US
Agent
Kenyon & Kenyon
Assignee
Digital Equipment Corporation
MA, US
IPC
G06F 9/38
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