05148265 is referenced by 560 patents and cites 9 patents.

A semiconductor chip having contacts on the periphery of its top surface is provided with an interposer overlying the central portion of the top surface. Peripheral contact leads extend inwardly from the peripheral contacts to central terminals on the interposer. The terminals on the interposer may be connected to a substrate using techniques commonly employed in surface mounting of electrical devices, such as solder bonding. The leads, and preferably the interposer, are flexible so that the terminals are movable with respect to the contacts on the chip, to compensate for differential thermal expansion of the chip and substrate. The terminals on the interposer may be disposed in an area array having terminals disposed at substantially equal spacings throughout the area of the interposer, thus providing substantial distances between the terminals while accommodating all of the terminals in an area approximately the same size as the area of the chip itself. The interposer may be provided with a compliant layer disposed between the terminals and the chip to permit slight vertical movement of the terminals towards the chip during testing operations. The chip and interposer assembly may be electrically tested prior to assembly to the substrate. A compliant layer disposed between the terminals and the chip permits slight vertical movement of the terminals towards the chip during testing operations, in which the terminals on the interposer are engaged with an assembly of test probles. The entire assembly is compact.

Title
Semiconductor chip assemblies with fan-in leads
Application Number
586758
Publication Number
5148265
Application Date
March 21, 1991
Publication Date
September 15, 1992
Inventor
Thomas H DiStefano
Bronxville
NY, US
Igor Y Khandros
Peekskill
NY, US
Agent
Lerner David Littenberg Krumholz & Mentlik
Assignee
IST Associates
NY, US
IPC
H01L 23/14
H01L 23/12
View Original Source