05109524 is referenced by 13 patents and cites 20 patents.

A digital processor has a controller, a data converter, a data register, and a logarithmic calculator. The processor has an address bus and a data bus for communication therewith. The address bus is connected to the controller. The data bus is connected to the controller and to the data register. Program instructions from the data bus are supplied to the controller and data on the data bus are supplied to the data register. Program instructions supplied to the controller are decoded and internal program instructions are generated by the controller. The controller communicates with the data converter, data register, and the logarithmic calculator via an internal bus through the internal program instructions. Integer data from the data bus are stored in the data register. The data converter receives the integer data, converts it into logarithmic data, and stores it in the data register. The logarithmic calculator receives the logarithmic data from the data register, operates it thereon, and supplies the resultant logarithmic calculation to the data register for storage. The data converter also communicates with the data register, receives the logarithmic data therefrom and reconverts it back into integer data to be ultimately supplied to the data register. The controller controls the operation of the data converter, data register, and the logarithmic calculator through the internal program instructions supplied on the internal bus.

Title
Digital processor with a four part data register for storing data before and after data conversion and data calculations
Application Number
751304
Publication Number
5109524
Application Date
October 28, 1988
Publication Date
April 28, 1992
Inventor
John P Guadagna
Morgan Hill
CA, US
Robert D Hemming
San Jose
CA, US
Wayne P Burleson
Palo Alto
CA, US
Korbin S Van Dyke
Fremont
CA, US
Lawrence F Wagner
Berkeley
CA, US
Agent
Limbach Limbach & Sutton
Assignee
VLSI Technology
CA, US
IPC
G06F 15/76
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