05097422 is referenced by 248 patents and cites 11 patents.

A method and apparatus for determining integrated circuit layouts from a virtual circuit description and specification of a technology. Starting with high-level descriptions of a circuit, a virtual geometric description of the circuit is developed using a virtual grid described in terms of reference points relative to a substrate surface. The relationships among the reference points are expressed as fractions of variables that can also be used to define the design rules. When the technology is specified, the relationships among the reference points is determined, as in the layout of the integrated circuit.

Title
Method and apparatus for designing integrated circuits
Application Number
917917
Publication Number
5097422
Application Date
June 29, 1989
Publication Date
March 17, 1992
Inventor
James E Thiele
Seattle
WA, US
Mark E Rossman
Redmond
WA, US
Richard E Oettel
Bellevue
WA, US
Steven G Danielson
Seattle
WA, US
Ludlow V Corbin II
Seattle
WA, US
Agent
Seed and Berry
Assignee
Cascade Design Automation Corporation
WA, US
IPC
G06F 15/60
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