05084637 is referenced by 40 patents and cites 21 patents.

A bidirectional level shifting interface circuit has first and second I/O ports and an FET with a drain-source channel connected between the first and second I/O ports. The first I/O port is connected to an I/O port of a first digital circuit operating at a relatively low supply voltage, and the second I/O port is connected to an I/O port of a second digital circuit operating at a relatively high supply voltage. This channel passes communication signals in each direction between the first and second digital circuit. A latching circuit comprising a P Channel FET is biased by the relatively high voltage supply, has an output connected to the second I/O port, and has a control input. The interface circuit further comprises an inverter circuit having a control input connected to the second I/O port and an inverted output connected to the control input of the latching FET such that when the second I/O port exhibits a binary one voltage caused by the first digital circuit, the inverted output exhibits a binary zero voltage to activate the P Channel FET to latch the second I/O port at sufficient voltage to drive the second digital circuit at binary one level.

Title
Bidirectional level shifting interface circuit
Application Number
7/358321
Publication Number
5084637
Application Date
May 30, 1989
Publication Date
January 28, 1992
Inventor
Roger P Gregor
Endicott
NY, US
Agent
Arthur J Samodovitz
Assignee
International Business Machines
NY, US
IPC
H04L 25/02
H04B 1/38
H03K 19/094
H03K 19/092
View Original Source