A reconfigurable signal processing device that includes a plurality of programmable modules that are reconfigurable to perform one of a plurality of selected signal processing functions. The modules may be reconfigured under software control to act as one of a time base generator, a counter, an accumulator, an address register, a delay circuit, and a timer. The plurality of modules are selectively reconfigured and selectably interconnected by a configuration and control circuit that receives command signals from the host processor containing the control software. The device further includes a plurality of input channels for receiving and initially processing analog signals to be tested and a high speed memory for storing data as required for the selected signal processing device. The devices that can be formed by configuring and interconnecting the programmable modules are for example, a counter/timer, an arbitrary function generator, a pluse generator, and a digitizer.