05041964 is referenced by 107 patents and cites 8 patents.

A method and apparatus for configuring a computer in a low-power mode are provided. In the low-power mode, dynamic random access memory is refreshed by a battery powered system in order to maintain the memory contents. Low-power mode is entered by saving an interrupt mask and by disabling interrupts, followed by saving the DMA status, finishing DMA operations, and disabling DMA. After these steps, the I/O state of the machine is saved by saving various I/O registers and ports. A referesh of the memory is forced before the system refresh operations are discontinued.

Title
Low-power, standby mode computer
Application Number
365147
Publication Number
5041964
Application Date
September 28, 1989
Publication Date
August 20, 1991
Inventor
James H McNamara
Santa Cruz
CA, US
James F Cole
Palo Alto
CA, US
Agent
Townsend and Townsend
Assignee
Grid Systems Corporation
CA, US
IPC
G06F 1/00
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