05012386 is referenced by 130 patents and cites 7 patents.

A package for containing high performance electronic components, such as high speed integrated circuits (ICs). The package bears a substrate of multiple layers having a cavity therein. Leads may be placed within holes in the substrate and soldered or otherwise electrically connected to conductive patterns or layers in the substrate. A thermally conductive insert is attached to one side of the substate. The insert has a pedestal which protrudes through the cavity in the substrate. An electronic component, such as an IC may then be mounted on the pedestal and electrically connected to a conductive metal pattern on one of the layers of the substrate. This assembly may then be coated with a dielectric material to form the package body, leaving the distal ends of the leads and the back side of the insert exposed. Since the IC chip or other component is directly mounted on the insert, waste heat generated by the chip may be directly channeled outside the package through the insert which effectively forms one wall of the package. The exposed leads may be formed into the desired configuration, including shapes suitable for surface mount technology. The use of a multiple layer substate permits the inclusion of ground and power planes for high performance circuits, such as emitter coupled logic (ECL) gate arrays, within the package itself.

Title
High performance overmolded electronic package
Application Number
7/428089
Publication Number
5012386
Application Date
October 27, 1989
Publication Date
April 30, 1991
Inventor
Paul Lin
Austin
TX, US
Michael B McShane
Austin
TX, US
Agent
John A Fisher
Assignee
Motorola
IL, US
IPC
H05K 7/20
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