04999525 is referenced by 34 patents and cites 12 patents.

A semiconductor cell for producing an output current that is related to the match between an input vector pattern and a weighting pattern is described. The cell is particularly useful as a synapse cell within a neural network to perform pattern recognition tasks. The cell includes a pair of input lines for receiving a differential input vector element value and a pair of output lines for providing a difference current to a current summing neural amplifier. A plurality of floating gate devices each having a floating gate member are employed in the synapse cell to store charge in accordance with a predetermined weight pattern. Each of the floating gate devices is uniquely coupled to a combination of an output current line and an input voltage line such that the difference current provided to the neural amplifier is related to the match between the input vector and the stored weight.

Title
Exclusive-or cell for pattern matching employing floating gate devices
Application Number
309247
Publication Number
4999525
Application Date
March 17, 1989
Publication Date
March 12, 1991
Inventor
Herman A Castro
Shingle Springs
CA, US
Chin S Park
Sunnyvale
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
Intel Corporation
CA, US
IPC
H03K 19/21
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