04933933 is referenced by 132 patents and cites 10 patents.

A deadlock-free routing system for a plurality of computers ("nodes") is disclosed wherein each physical communication channel in a unidirectional multi-cycle network is split into a group of virtual channels, each channel of which has its own queue, one at each end. Packets of information traversing the same physical channel are assigned a priority as a function of the channel on which a packet arrives and the node to which the packet is destined. The packet's priority is always increasing as it moves closer and closer to its destination. Instead of reading an entire packet into an intermediate processing node before starting transmission to the next node, the routing of this invention forwards every flow control unit (flit) of the packet to the next node as soon as it arrives. The system's network is represented as a dependency graph, which graph is re-ordered to be cycle free. The resulting routing function of the cycle free channel dependency graph is rendered deadlock-free, and the system's cut-through routing results in a reduced message latency when compared under the same conditions to store-and-forward routing.

Title
Torus routing chip
Application Number
6/944842
Publication Number
4933933
Application Date
December 19, 1986
Publication Date
June 12, 1990
Inventor
Charles L Seitz
San Luis Rey
CA, US
William J Dally
Arlington
MA, US
Agent
Elgin Edwards
Edward O Ansell
Donald A Streck
Assignee
The California Institute of Technology
CA, US
IPC
H04J 3/26
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