04926323 is referenced by 137 patents and cites 8 patents.

A streamlined instruction processor processes data in response to a program composed of prespecified instructions in pipeline cycles. The processor comprises an instruction fetch unit, including an instruction interface adapted for connection to an instruction memory and for fetching instructions from the instruction memory. The instruction fetch unit includes an instruction prefetch buffer coupled to the instruction interface for buffering a sequence of instructions supplied to the instruction interface. A branch target cache is coupled with the prefetch buffer for storing sets of instructions retrieved from a corresponding set of locations in the instruction memory, having sequential instruction addresses. The first instruction in each such set is a branch target instruction in the program.

In addition, an execution unit including a data interface adapted for connection to the data memory, executes the instructions in pipeline cycles. The execution unit includes a storage facility, coupled to the data interface, for storing data in a file of data locations identified by file addresses. The storage facility includes at least two read ports and one write port operable in response to file addresses. An addressing unit coupled to receive the instructions from the instruction register, supplies the file addresses to the read ports and the write port under program control. In addition, the addressing unit is operable in response to a stack pointer providing dynamic allocation of the file of data locations to processes within the program.

A memory management unit is coupled to the data interface. The memory management unit includes an address interface adapted for connection to the data memory and the instruction memory for supplying instruction addresses to the instruction memory and data addresses to the data memory, in a simple single access mode, a pipeline mode and a burst mode.

Title
Streamlined instruction processor
Application Number
7/163917
Publication Number
4926323
Application Date
March 3, 1988
Publication Date
May 15, 1990
Inventor
David I Sorensen
San Jose
CA, US
Timothy A Olson
Sunnyvale
CA, US
Ole H Moller
Lyngby
DK
Cheng Gang Kong
Saratoga
CA, US
William M Johnson
San Jose
CA, US
Smeeta Gupta
Saratoga
CA, US
Philip M Freidin
Sunnyvale
CA, US
Rod G Fleck
Munich
DE
Brian W Case
Sunnyvale
CA, US
Gigy Baror
Austin
TX, US
Agent
Fliesler Dubb Meyer & Lovejoy
Assignee
Advanced Micro Devices
CA, US
IPC
G06F 9/00
G06F 9/40
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