04920477 is referenced by 84 patents and cites 11 patents.

A data processor has a central processing unit and at least one pipelined memory controller circuitry. The central processing unit addresses data in the memory using a virtual address memory table lookaside buffer and features a data miss recovery circuitry wherein, after a memory access error condition has been detected, the instruction causing the error condition, and those instructions entering the memory pipeline after the instruction causing the error condition, are replayed. The method and apparatus for replaying the instructions use first in-first out buffers for storing the virtual address data and instruction status data relating to each memory access instruction. That stored data is then retrieved after an error condition is detected so that the instruction sequence, beginning at the data miss, can be replayed.

Title
Virtual address table look aside buffer miss recovery method and apparatus
Application Number
7/40990
Publication Number
4920477
Application Date
April 20, 1987
Publication Date
April 24, 1990
Inventor
Paul K Rodman
Madison
CT, US
David B Papworth
Guilford
CT, US
John O Donnell
Guilford
CT, US
Robert P Colwell
Guilford
CT, US
Agent
Hale and Dorr
Assignee
Multiflow Computer
CT, US
IPC
G06F 11/00
G06F 9/38
G06F 12/08
View Original Source