04912709 is referenced by 55 patents and cites 7 patents.

This application describes a peripheral cell structure for VLSI chips that requires the use of standard cells having both input and output capability connected to nearly all of the signal carrying pins. The cells function is alterable (to input or output and to where the data input signals originate) by control signals which may originate with a control register. The clock input signal is split into two independent signals to selectively disable the input or output registers, thus allowing the control register to be changed without affecting the contents of the other two registers. An early signal is also provided to prepare for mode changes.

Title
Flexible VLSI on-chip maintenance and test system with unit I/O cell design
Application Number
7/112920
Publication Number
4912709
Application Date
October 23, 1987
Publication Date
March 27, 1990
Inventor
Michael F Maas
Maplewood
MN, US
David H Allen
Eagan
MN, US
Brian D Borchers
Burnsville
MN, US
Don A Daane
Burnsville
MN, US
Daniel J Baxter
St. Paul
MN, US
Judy L Teske
Burnsville
MN, US
Agent
Frederick W Niebuhr
Michael B Atlass
Robert M Angus
Assignee
Control Data Corporation
MN, US
IPC
G01R 31/28
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